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Resolver interface and signal conditioner | Drehmelderschnittstelle und Signalformer | Conditionneur de signal et d'interface de résolveur

Patentnummer:EP2177879B1
IPC Hauptklasse:G01D000522
Anmelder:Hamilton Sundstrand Corporation (0)
One Hamilton Road, Windsor Locks, CT 06096-1010, US
Erfinder:Bauer, Ronald P. (0)
79 Southwest Avenue, Windsor Lock, CT 06096, US
Anmeldung:29.05.09
Offenlegung:16.10.08
Patenterteilung:29.04.20

Abstract / Hauptanspruch
A resolver interface (10) includes separate anti-aliasing filters (20, 22) for sine and cosine signals. The separately filtered signals are then time share multiplexed (26) to a single analog to digital (A/D) converter (28). Because all of the inputs are fed through the same A/D converter, any error, difference or shift caused by the A/D converter is shared across all of the inputs. A Field Programmable Gate Array (FPGA) (30) and processor (38) are used to digitally filter (34), demodulate (36) and compute position (46).

EP2177879B1


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